|
產品特色 :
• Supports SPMI v 1.0/ 2.0 specifications
• Ability to configure it as Master or Slave
• Supports Sole Master feature & Request Capable Slave (RCS)
• Supports the complex BUS arbitration process
• Error injection: parity error, ACK/NACK error, and Skip SSC error
• Variable SPMI data speeds up to 26Mhz, Voltage drive levels
(1.2 or 1.8), and Duty Cycle (25%,50%, and 75%).
• Simultaneously generate SPMI traffic and Protocol decode of the Bus
• Error Analysis in Protocol decoded data
• API support for automation in Python and C++
• Optional Protocol Implementation Compliance Statement (PICS)
supports scripts
|